****************************************************************** * TMS320C26 DSP STARTERS KIT NEWS * * * * >>> WIRING ERROR IN DSK BOARD REVISION (A) * * * * >>> 115200 BAUD NOW POSSIBLE (3X THE OLD RATE!) * * * * >>> HIGH SPEED APPLICATIONS * * * * SPECTRUM ANALYZER -> DSK_SA26 *NOW* * * (Download DSK_SA2X.EXE) * * OSCILLISCOPE -> DSK_OS26 *NOW* * * (Download DSK_OS2X.EXE) * * AUDIO ANALYSIS SYSTEM -> DSK_AA26 *NOW* * * (Download DSK_AA2X.EXE) * * * * >>> TIP FOR BUILDING DAUGHTER CARDS * * * ****************************************************************** ****************************************************************** * * * >>> WIRING ERROR IN DSK BOARD REVISION (A) * * * ****************************************************************** You will not notice this until external circuitry is hooked up to the DSK but the pullup resistor pack is not connected to VCC! (Ooops). With active signals pulling high, the problem went unnoticed in the rev A boards until a fellow DSK user pulled too many lines low at one time and got some awfully strange behavior! The earlier engineering revision of the DSK, that some users have, is free of the problem. These boards (about 100 of them) have a revision stamp of '*' and are labeled as 'DSP Designers Kits' instead of 'DSP Starters Kits'. Adding VCC to pin 1 of RP1 is easy to do and simply involves locating a suitable source of VCC to attach a jumper to. The suggested node to connect to is the VCC pin of the oscillator since there are only logic levels (ground and VCC) available on any pin of that device. The best method for point to point wiring I have is to use wire-wrap wire which is single strand, very fine gauge, well insulated and easy to work with. If you plan to use the DSK as is, don't worry! 8/10/93 KEL ****************************************************************** * * * >>> 115200 BAUD NOW POSSIBLE (3X THE OLD RATE!) * * * ****************************************************************** How is this possible? First the communications kernal has been tweeked and now uses the timer to generate the RS232 timing. The advantage is that each RS232 sample can now be resolved to 100nS instead of 200nS. At the moment this new feature has not been incorporated into the debugger but it is available in several new applications code examples. In order to use this technique in the debugger, the code would need to fit in the original kernals reserved 256 words, which is rather tight. Also since this new technique uses the timer it may not be suitable for all users. Since applications are not as restricted on code size, an extra few words are not a problem. Below are some details of how the autobaud feature is done. THE OLD BOOTLOADER RECEIVE ROUTINE LOOKS LIKE THIS... IN_ROMCODE: || || ; LARP AR0 ; Initialize AR0 for counting LARK AR0,0 ; WAIT_4_FALL: BIOZ MEASURE,*,AR0 ; Wait for falling edge of startbit B WAIT_4_FALL ; SELF: BIOZ SELF,*+ ; Basic startbit measuring technique SAR AR0,BITLEN ; || || ; NOTE: 3 CYCLE/LOOP EXECUTION!!! During bootup the length of the first startbit is measured using a "SELF: BIOZ SELF ,*+" instruction. The resolution here is limited to the cycle count of the BIOZ instruction which is three cycles in ROM! Because of the low loop rate, bitlengths are not well defined at higher bauds. For this reason, the initial boot is done at 1/4 the final baud rate. This results in a very accurate cycle count which is then scaled up to the final working baud rate. This results in a clean bootup at 115200 almost every time! All the host needs to do is readjust the commport timer to reflect the higher baud! Also, as a side note, these kinds of rates are possible without using the timer but there is a catch. If a 'RPTS BITLEN' - 'NOP' is used, 100 nS resolution is possible. However, since the RPT counter has a maximum of 8 bits of resolution (25.6uS) you would be restricted to 38400 or higher baud rates. That is unless multipler timer loops are used to extend the range. This is also being explored since it eliminates the use of the timer and frees up that interrupt. 8/10/93 KEL ****************************************************************** * >>> HIGH SPEED APPLICATIONS * * * * DSK_SA26.EXE : Basic high speed spectrum analyzer * * : with over 30 frames a second! * * * * DSK_OS26.EXE : Basic DC-20KHz oscilliscope with * * : excellent dynamic characteristics * * * * DSK_AA26.EXE : Basic Audio Analyzer for generating * * : DC-20KHz sine waves and measuring the * * : response of a system. * ****************************************************************** * AS WITH ALL DSK AND BBS FILES CONSIDER THESE APPLICATIONS TO * * DELIVERED AS IS AND NOT 100% RELIABLE UNDER ANY CIRCUMSTANCES.* * EACH OF THESE FILES ARE VERY PRELIMINARY AND USE CODE WHICH * * MAY NOT BE 100% SUITABLE IN ALL SYSTEMS. USE THEM WITH * * CAUTION AND BE PATIENT IF YOU PLAN TO MODIFY THEM. THE CODE * * IS NOT COMPLETE OR BUG FREE! * ****************************************************************** DSK_SA26 -------- If you like the spectrum analyzer version in DSKL you will absolutely love this new application! The display for the 256 point FFT, using 115 kbaud communications, is updating 30 times a second on my 486 PC! You may notice that this applications are pretty much the bare-bones of the basic application but they are an excellent starting point for your specific requirements! Here are the basic refinements which are now implimented - Data is now received from the DSK in blocks. The older DSK_SPEC used a handshake protocol requiring one transmission for each byte received. This resulted in a 2X speed increase. - Only the real half of the data is transmitted back to the host. This also results in a 2X speed increase - The screen is no longer completely blanked and redrawn for each frame of data. Screen updating is now done by using XOR line draws which are initialized using Borland C's function 'setwritemode(int);' The speedup here is significant but will vary between systems. - A new communications kernal is now capable of 115 kbaud! Things to think about..... 1) User interface for changing the A/D rates and filter characteristics 2) Larger FFT's if external memory is available 3) Commport buffering and interrupts. 4) Generating DAC output signals 5) Obtain a signal generator able to go out to about 10MHz and sweep the signal from DC to 10MHz. Because of the relatively good aperature characteristics of the TLC32040 signal rolloff is not evident until about 1MHz. These aliasing effects are a terrific benefit in that IF down converters from <1MHz IF are possible! You could even use the DSK with a selectable IF as a broadband spectrum analyzer to almost any frequency! This can also be used for direct IF to Audio conversion! DSK_OS26 -------- As in the application above the baud rate and user I/O has been vastly improved within the limitations stated. In this case the A/D is simply collects a frame of data starting after a threshold crossing and passes the frame to the host for display. The only tricky part is getting the host and DSP timeouts (no synch) to cooperate and not generate RS232 timeout errors on either side. The astonishing part of this application is that the A/D has a sample and hold which has very good dynamic performance. Often this is given as an 'aperature' characteristic where the effective width of the sample and the time accuracy is given. However you won't find this in the TLC32040's data sheet because it is not tested! Sample and hold aperatures are usefull in this case in that they allow the A/D to convert signals, or more acurately in this case harmonics, well above the actual sampling rate. This is often called undersampling or aliasing which in some cases like this are a great benifit. IE for spectrum analyzers, IF down converters and direct IF to Audio conversion. However in the case of the oscilliscope the effect is to accurately reconstruct square waves, triangle waves and other dynamic signals. Things to think about..... 1) A better user interface with threshold and gain adjust, window length averaging etc... 2) Find other ways to use the 'undersampling' ability of the sample and hold 3) Find a way to skew/synch the incoming sample to the conversion clock. This would allow samples to be taken 'between' other samples giving effective sampling rates of around 1 MHz. DSK_AA26.EXE ------------ This application incorporates a precision sine wave generator and a A/D capture window which is slaved to the frequncy of the sine generator. In this case precision sine wave signals are generated using a bit- reversed table lookup method which is effectively circular addressing. Each DAC sample is presented to the DAC on an interval determined by a timer interrupt. Using the timer gives a very precise and wide dyanic range of intervals which in turn results in better than 1% frequency accuracy. Since the DAC's transit interrupt is not used, the transmit register is continualy overrun itself until a new sample is placed in the DXR by the next timer interrupt. An oversampling technique could be used to improve the S/N ratio but it is suprisingly good as is and the loss of CPU bandwidth would result in less frequency (timer interrupt) accuracy. Since 20Khz bandwidth and less than 1% frequency accuracy of the synthesized signal is desired this was not implimented. The capture window is also unique in that it is also slaved to the timer interrupt and therefore the sine wave being generated. Since they are synchronous, each succesive window can be 'averaged' with the last. This results in a very high rejection of all signals which are not harmonicly related to the fundamental frequency. Actually the technique is called correlation and not averaging since only the previous sum of windows is added to the present window. A sliding average of several windows would be far better but would require a buffer for all past windows since the last window must always be subtracted from the present sumation. This requires more memory than the DSK has on chip! Finaly, the host determines the magnitude of the fundamental signal that is contained in the sample window. This is done by sifting through the data and performing a DFT of the first harmonic. This gives an extremely narrowband filter when used in conjunction with the correlation/averaging window. The result of the DFT of the fundamental is then subtracted from the original data window and a THD is calculated. Actually the THD calculation is not correct by definition at the moment but it is resonably close! Things to think about 1) The phase angle of W[1] is known and can be displayed 2) A sliding average would work better than correlation (needs memory!) 3) The THD calculation is not correct 4) Separate harmonics can be extracted 5) The DFT and THD is being calculated in the host and could be migrated to the DSP. However, this would not result in significant performance benefits and would lessen user flexability. 8/10/93 KEL ****************************************************************** * TMS320C26 DSP STARTERS KIT NEWS * * * * >>> TIP FOR BUILDING DAUGHTER CARDS * * * ****************************************************************** Some Q's have come up on just how to put together a daughter card for the DSK. Not everyone can afford to have a printed wiring board (PWB) built proffesionaly so what is the best method. Here is what I did with a lot of success. Use FEMALE header conectors on the DSK. MALE on the daughter card. The advantage is that the DSK does not have pins sticking out the bottom to get bent while it sits (slides like a hockey puck) on your desk. If you need to get to a signal, stick a pin (from a header) into the socket. On the daughter card, my preference is to use a two sided PWB with a ground plane on one side and square solder pads on the other. The advantage is that the solid ground plane gives much better signal quality and is always easy to get to. Grounding is almost universily the biggest problem in high quality signal applications! The only disadvantage is that the holes are not plated through and if you are not careful and make a mistake, removing wires can lift a pad. I am pretty good and have not had one come up yet. (strike that, I recently boogerred one up!). Also, these boards do not cost much. About $7.50 for a 4.25 X 6.5 board at one of the local electronics store here in Houston. Putting down wires is also easy if you have the right tools. In this case I have found that wire-wrap wire, the wire-wrap stripper and a pair of tweezers works wonderfuly (I do not even need the tweezers!). The way to connect two nodes is to strip the wire back a little at each end and nip it to about 1/32" exposed wire. If the pad is pretinned, simply reheat the solder and stick the wire in. Remove the heat and the wire is attached. With a little practice you can make very clean and easy to manage (and debug) circuit boards. 8/10/93 KEL